Dear list members We are a chip design house with past experience in SPARC CPU design and a strong foundry partner. See our company profile at...
242
hwany96@...
Sep 22, 2000 4:46 am
hello! I am student in Korea. I want to use synplify 20day's evaluation. But I could not get license. of course I sent e-mail to synplicity. Do anybody help...
243
Hans Tiggeler
h.tiggeler@...
Sep 22, 2000 7:33 am
Your best bet is to ask your supervisor to get a University license, see http://www.synplicity.com/specialprograms/intl_university.html, Regards, Hans....
244
Steve Fincham
SFincham@...
Sep 22, 2000 8:21 am
Hello If you have e-mailed for a license, be patient. It took a week for me. Try also sending them a reminder to the same e-mail address. Steve ... From:...
245
Jiri Gaisler
jgais@...
Sep 22, 2000 9:20 am
... I would advise to wait for the AMBA version, where you will have a more standardised way of attaching IP cores. Also, a generic coprocessor and FPU...
246
lowtl@...
Sep 22, 2000 10:18 am
... You can target to Xilinx with Synopsis. But the flow is interesting. The P&R tool from Alliance/foundation can only take in XNF/EDIF. Writting XNF from...
247
fryman@...
Sep 22, 2000 1:42 pm
What no one on this list is mentioning is that Synplicity will *not* give demo licenses to Universities _or_ students. Period. At least not for Synplify. I...
248
Gareth William Morris
ee71gm@...
Sep 22, 2000 2:47 pm
Hi, I've been looking at the documentation for the LEON core and I have seen that a DMA controller is present on the architecture diagram. The documentation...
249
Jiri Gaisler
jgais@...
Sep 22, 2000 3:01 pm
... There is indeed a behavioural dma controller in dma.vhd. It is not really very usefull - I just used it to test the memory controller interface. I would...
250
Gareth William Morris
ee71gm@...
Sep 22, 2000 3:55 pm
Jiri, Thanks for your advice. An AMBA bus DMA controller is a project I had in mind anyway so it looks as if we're thinking on the right lines. I look forward...
251
guilin@...
Sep 24, 2000 12:29 pm
Hello? Thank you for your response. I'm the beginner of Design. What is FC2 ? How can I use it? -Kui-yon ... interesting. ... Their ... P&R ... clocking...
252
lowtl@...
Sep 25, 2000 1:45 am
FC2 is FPGA compiler II from synopsys. And I think you have missed this part of the message "But FC2 can not synthesize the leon core properly" After trying...
253
Steve Fincham
SFincham@...
Sep 26, 2000 8:40 am
Hello You recommend "Synplify"; for synthesising to FPGA. What tool would you recommend to synthesise the Leon to custom gates/chip. Thanks Steve...
254
D. Jeff Dionne
jeff@...
Sep 27, 2000 6:33 am
We've were sucessful in our efforts at getting uClinux running on LEON! For people in the area, we have a small and very cool demo at ESC in San Jose, running...
255
ext.zxmulsorev05@...
Sep 27, 2000 7:01 am
Hello, I never talked on this group... My name is Etienne CHEVREAU and I am working on LEON, in order to implement it in a System-On-Chip. Thus, I have a few...
256
Paugam Luc
PAUGAML@...
Sep 27, 2000 7:51 am
Hi jeff, Whoooaaah !!! Great job indeed. But for European people, it could be difficult to see your demonstration (take some photos). Thus could you tell us...
257
De Lescure Benoit
DELESCUREB@...
Sep 27, 2000 11:41 am
Hi Jeff, Could you tell us what was the LEON configuration you used for this demo (the value of the "conf" constant in "device.vhd") : size of register file...
258
gzhang
gzhang@...
Sep 27, 2000 5:21 pm
wooo... that's great! can you take a video and show it to us online? for example: a realplayer ram movie. guoqing ... From: D. Jeff Dionne...
259
Jiri Gaisler
jgais@...
Sep 28, 2000 8:05 am
... Yes, it works fine. ... Normal reset mode. ... Yes, but you need to program the memory config registers with your board settings. Jiri. (All this is also...
260
Jiri Gaisler
jgais@...
Sep 28, 2000 8:07 am
... Synopsys. Jiri. ... Jiri Gaisler, ESA/ESTEC, Box 299, 2200 AG Noordwijk, the Netherlands email: jgais@... voice:+31-71-5654880...
261
Ramon Biniasch
ramon.biniasch@...
Sep 29, 2000 7:29 am
Hello, we think about using LEON for an internal project concerning object-oriented SoC-design. As I understood from the archive and the LEON homepage the core...
262
Jiri Gaisler
jgais@...
Sep 29, 2000 8:58 am
... I have run leon-2.1 succefully on a XCV300, passing all available test benches. Recently, the Lineo people reported succeful boot of uCLinux, further...
263
Ram Kumar
r.ramk@...
Sep 29, 2000 11:41 am
Hi, Is there any way to simulate the Leon processor using a synopsys-VSS (1999.10) ? If not, then can anyone recommend any other method of simulating the...
264
Jiri Gaisler
jgais@...
Sep 29, 2000 12:30 pm
... Use modeltech, synopsys VSS is not VHDL compliant enough. I'm working on getting VSS to grok the next version of LEON, but I'm not sure I will be able to...
265
Ruediger Jordan
ruediger.jordan@...
Sep 29, 2000 1:54 pm
Hello, I got LEON work on a Xess XSV300 board (Xilinx XCV300 FPGA). I can boot form the Flash with a modification of Jiris pmon.c. (without including standard...
266
Jiri Gaisler
jgais@...
Sep 29, 2000 2:11 pm
... I remember fixing a few things in mkprom some weeks ago - I can't remember the details but it had to do with the initialisation of the memory config...
267
Raja Gopal
rgopal@...
Sep 29, 2000 8:24 pm
Jiri, XCV300 has 16 blocks of memory each 4kbits. And total select RAM is 98kbits. Raja ... Click here for Free Video!! http://www.gohip.com/freevideo/ ... ...
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D. Jeff Dionne
jeff@...
Sep 30, 2000 5:30 am
... .. ... There are a number of things you need to do in order to get LEON running on the Xess XSV board. I'll send some patches, but I'm hoping to take the...
269
fryman@...
Sep 30, 2000 3:15 pm
I for one would be interested in the patches necessary to make Leon run on the XESS board. I was planning on spending next week to bring Leon up on an Xess...
270
jeff@...
Sep 30, 2000 9:24 pm
Here are the patches we used with the Xess board. Included is also the VHDL for the configuration CPLD, you'll need to upgrade it's code first. uClinux...
